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HDL Simulation
ModelSim from Model Technology is the definitive HDL Simulator. An industry standard in the HDL world for simulation and debug, its practical, easy to use GUI, and simulation performance has made ModelSim the most widely used VHDL, Verilog, SystemC and mixed language simulator in the world.
The popularity of ModelSim's product line reflects Model Technology's commitment to delivering the best simulation technology, performance, support and price. ModelSim products are uniquely architected using technology such as Optimized Direct Compile for faster compile times and simulation performance, Single Kernel Simulation (SKS) and Tcl/Tk for greater levels of openness and faster debugging. Exclusive to ModelSim, these innovations result in leading compiler/simulator performance, complete freedom to mix VHDL, Verilog, SystemVerilog, SystemC and PSL as well as the unmatched ability to customize the simulator. In addition, with each ModelSim license, designers enjoy Model Technology's ease of use, debugging support, robust quality and technical support.
Online
Demos Available
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Data Sheet Download :
ModelSim PE
ModelSim SE
WaveForm Compare
PE/SE Comparison
Debug Detective
ModelSim OEM Versions - ModelSim
is available for Actel, Altera,
Atmel, Lattice,
Xilinx
ModelSim is available through some FPGA vendors, either as a cost option or as part of their FPGA development kit. Whilst these OEM versions offer very low cost access to ModelSim they do have a number of limitations in terms of design size, simulation speed and feature set when compared to a full ModelSim PE/SE license.
ModelSim Highlights:
We provide the leading price/performance value for HDL simulation software. Our ModelSim products are intuitively easy to learn and use, and our top design engineers are always available to offer technical support.
- Leading Standards Support
- Optimized Direct Compile
- Tcl/Tk Customizable User Interface
- Dynamically-linked Windows For Easy Debugging
- System Requirements
- Complete Product Support and Maintenance
ModelSim PE
Tcl/Tk technology provides an easy-to-use interface which dynamically links windows for fast and uncomplicated debugging. |
DATASHEET |
For more information
or to discuss evaluating ModelSim PE please contact Saros
by e-mail or call us on +44 (0)1491 837787.
ModelSim® PE, our entry-level simulator, offers either VHDL, Verilog, or mixed-language simulation. Coupled with the most popular HDL debugging capabilities in the industry, ModelSim PE is known for delivering high performance, ease of use, and outstanding product support.
ModelSim SE
Tcl/Tk technology provides an easy-to-use interface which dynamically links windows for fast and uncomplicated debugging. |
DATASHEET |
For more information
or to discuss evaluating ModelSim SE please contact Saros
by e-mail or call us on +44 (0)1491 837787.
High-Performance, Mixed-Language Simulation
ModelSim® SE, our flagship simulator, combines high performance with the most advanced debugging capabilities in the industry. ModelSim SE offers unmatched flexibility by supporting UNIX (including 64-bit), Linux, and Windows-based platforms.
Model Technology was the first to put the award-winning SKS technology in the hands of engineers, enabling transparent mixing of VHDL, Verilog, SystemVerilog and SystemC in one design, with a common intuitive graphical interface for development and debug at any level, regardless of the language. ModelSim SE delivers the unique combination of a native compiled code architecture for maximum performance, coupled with platform independence that lets you compile once and run anywhere.
Differences between the test and reference signals are highlighted in red markers in the Wave window; or differences can be output to a text file.
With integrated Waveform Compare, Performance Analyzer, and Code Coverage capabilities, high performance compiler/simulator optimizations, and the unmatched ability to customize the simulator, ModelSim SE is the simulator of choice for both ASIC and FPGA design.
ModelSim SE is used on today's largest multi-million gate designs. Global optimizations examine the entire design at compile time and use advanced algorithms to improve simulator performance at all levels of abstraction.
Users of gate-level simulation can take advantage of special VITAL and Verilog optimizations that significantly reduce gate-level simulation times and ensure small memory footprints. Our accelerated Standard Delay Format (SDF) annotation speeds up SDF file processing.
ModelSim SE also generates compressed waveform files to efficiently store data from large designs. In anticipation of designs that are too large to fit into 32-bit workstations, ModelSim SE was the first simulator to provide 64-bit platform support.
Waveform Compare
The Waveform Compare feature (standard with ModelSim SE) further increases design verification through-put by allowing you to quickly compare the results of two simulations in order to identify design errors. Waveform Compare is completely configurable.
You can specify continuous compares, clocked compares, and even create complex compares using ModelSim's virtual signal capabilities. Waveform Compare results can be viewed in a display window or captured in text files.
Signal Spy
The Signal Spy feature allows you to easily see signals buried deep in a VHDL or mixed-language design hierarchy. You can monitor any signal anywhere in the design and incorporate it into your testbench without having to modify existing code.
Performance Analyzer
A first in the industry, ModelSim SE with Performance Analyzer speeds simulation by identifying simulation "bottlenecks". The Performance Analyzer uncovers inefficient code as well as more elusive performance sinks, such as non-accelerated library cells, unnecessary signals on sensitivity lists, unnecessary testbench code, and architectural bottlenecks. It works with both VHDL and Verilog, at the behavioral, RTL, and gate levels. You can examine Performance Analyzer results, then make modeling changes to dramatically decrease simulation run times.
Code Coverage
The code coverage analysis provided in ModelSim SE improves efficiency for all designers - not just verification engineers. This easy-to-use, integrated code coverage capability helps you develop more complete, robust testbenches more quickly. Code coverage can be employed at the block level to ensure adequate module testing as well as at the full chip level to ensure good system-level testing.
As with other ModelSim features, the code coverage tool can be run with or without the user interface in batch mode. The flexible reporting feature enables a designer to create custom reports with just the data required. Because ModelSim SE code coverage is integrated, it is virtually non-intrusive - no instrumented HDL code is required. It also has little impact on simulation performance: typically less than five percent.
Simulation Farm Support
ModelSim SE is ideal for today's simulation farms. Its "compile once, run anywhere" capability makes it easy to support farms with a variety of platforms. In addition to single and mixed-language support, ModelSim SE also offers a language-neutral license. Single licenses can be used to simulate either VHDL, Verilog, SystemVerilog and SystemC, making it easy and economical for companies to set up adaptable farms that can adjust to user demand. ModelSim SE includes utilities, such as Checkpoint-Restore, that enable jobs to be saved and restarted in farm environments - greatly improving farm utilization.
Complete Product Support and Maintenance
Model Technology provides the highest levels of support in the industry with our unique "Engineer of the Week" approach. You receive support from the engineers who design the ModelSim products. A standard annual maintenance contract provides technical support, maintenance releases, ModelUser (an email newsletter), and access to on-line support and technical services.
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