The HDL Designer Series of products provides an integrated and fully flexible design capture and data management environment for either individual or teams of designers. Integration with common version management...
I/O Designer offers a unique process for moving between the FPGA and PCB design flows from the top level HDL description to the PCB level symbol as well as to...
LeonardoSpectrum™ offers customers a well-proven, mature synthesis solution for both FPGAs and ASICs.
Benefits
One tool, one easy learning curve, one set of scripts -- for CPLDs,...
The combination of industry-leading performance and capacity with the best integrated debug and analysis environment makes ModelSim the simulator of choice for both ASIC and FPGA design.
Combining single kernel...
The Precision range of RTL logic synthesis tools provides FPGA vendor-independent logic synthesis offering reduced time to market, fewer design defects, and superior quality of results. The powerful optimisation engines,...
The first SystemVerilog, single-kernel functional verification environment wth a constraint solver, an assertion engine, functional coverage and a common user interface. Questa provides a complete SystemVerilog design environment and built-in...
SolidAC from Averant automatically checks your RTL code for a number of common, yet elusive, design problems including:
Deadcode
Dead lock / Livelock...
Vista™ is the industry's most advanced SystemC debug toolset, providing powerful hardware and C/C++ oriented views and debugging mechanisms. Vista dramatically reduces ESL and SystemC debugging cycles and enables hardware...