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The
Complete HDL Solution
An HDL
design flow has a number of discrete stages. Saros Technology have your requirement
covered at every stage of a project, providing not just the core tools,
but the services support and ancillary tools which go to making a
complete working solution in the real world.
Click
the cursor over the boxes to see a short description, and then follow
the links for more information.
Design Capture
HDL
Designer provides the engineer with a complete design management
and graphical HDL entry methodology. Support for a revision control,
as well as a range of graphical editors for creating the design
are available. Full integration with downstream simulation, synthesis
and layout tools puts HDL Designer at the heart of the design environment.
Take
a tour of HDL Designer or further
information, and a free trial download.
IP
(Intellectual Property)
CAST provides a broad range
of IP cores for electronic design. They provide not only
off-the-shelf Cores
and Models
but provide an IP
Development Service for custom cores.
Simulation
ModelSim - The Industry
Standard simulator from Model Technology. Selected by more design
engineers than any other VHDL, Verilog, and mixed language simulator.
Advanced Verification
The Averant's Static Functional Verification tools enables a quick and
exhaustive verification to be performed on many design blocks where simulation would not be sufficiently thorough or would take too long to run.
The tool will also isolate untested portions of your HDL design and will integrate with Simulators and Verisitys Specman to provide a comprehensive,
robust and efficient verification strategy on larger more complex designs.
Synthesis
FPGA Synthesis from
Mentor Graphics offers the highest quality synthesis. Leonardo brings
a consistent flow for both FPGA and ASIC designs. Full hierarchical
control realises the ultimate solution for efficient high density
synthesis.
Protocol
Compliance Checking
SolidPC is a tool
for verifying that designs obey the ARM
AMBA
2.0 AHB, APB and AMBA
3.0 AXI protocol rules. Based on formal methods for exhaustive
passes, with protocol rules written and endorsed by ARM, SolidPC
is the tool of choice for AMBA protocol verification. The tool
is easy to use, and require no knowledge or experience of formal
methods.
Hardware
Protoyping
HAPS is a modular ASIC hardware prototyping
board.
Automatic
Timing Constraint Generation
Focus is an Automatic Timing Constraint
Generation tool which identifies multicycle paths within a design.
HDL
Training
Up to date training is an essential part of today's design environment.
Whether a PC based multimedia tutorial, or a full five day course,
the resulting improvements in productivity are extremely valuable,
reducing your project cycle times.
Saros
Technology works actively with the UK's premier HDL training organisations,
Doulos and
Esperan, to
provide tailored training. Saros provides seats of our products
to ensure participants have access to the best quality HDL tools
available.
PCB
Layout
Our sister company Millennium Technology offers a range of leading
PCD layout solutions. Please visit www.millennium-eda.com
Device Layout
With a complete HDL design flow, your choice of silicon solution
becomes a simple matter of appropriate technology for your performance,
density, and cost metrics. Here we feature products and software
from some of our Silicon Partners.
Contact
Saros
Contact details for more
information and support.
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