Creating high quality integrated circuits can only be achieved by employing high-quality production tests that identify manufacturing defects before they leave the factory. Shrinking geometries have introduced a wide variety of defect types that can only be detected with thorough scan testing. However, scan testing can be prohibitively expensive without high levels of pattern compression.

TestKompress® is the industry leading automatic test pattern generation (ATPG) tool that provides the highest quality scan test with the absolute lowest test cost. TestKompress has an industry-proven ATPG engine that applies effective fault models to your entire logic design. Manufacturing test costs are held in check by an award-winning test pattern compression technique called Embedded Deterministic Test (EDT™).

TestKompress has all the tools to configure a design with scan test structures into one that utilizes test pattern compression. Then the ATPG engine creates a compact set of compressed patterns that are ready to be applied by the automatic test equipment (ATE).

TestKompress uses the patentedEDT technique to get the highest level of testquality while getting up to100X pattern scan chain compression

Additional features include:

• Thorough testing of digital logic with scan-based patterns
• Reduces both ATE test time and test data volume by up to 100X
• Supports low pin count test strategies (as few as 1 scan channel)
• Fast pattern generationthrough high performanceATPG algorithms