Siemens EDA



ALL PRODUCTS



Calibre Design Solutions

Calibre Design Solutions delivers a complete IC verification and DFM optimization platform that speeds designs from creation to manufacturing, addressing all sign-off requirements.

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Catapult

Industry leading C++ / SystemC High-Level Synthesis with Low-Power estimation / optimization. Design checking, code, and functional coverage verification plus formal make HLS more than mere “C-to-RTL."

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HDL Designer

With deep analysis capabilities, advanced creation editors, and complete project and flow management, HDL Designer delivers a powerful HDL design environment.

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HyperLynx Series

The HyperLynx suite of tools eliminates signal integrity, crosstalk, and EMC problems early in the design cycle—enabling you to verify your layout before manufacturing. These simulation tools come ready to use in virtually any design flow and offer unprecedented ease-of-use.

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LeonardoSpectrum

LeonardoSpectrum offers customers a well-proven, mature synthesis solution for both FPGAs and ASICs.

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ModelSim

The combination of industry-leading, native SKS performance with the best integrated debug and analysis environment makes ModelSim the simulator of choice for both ASIC and FPGA design.

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OneSpin 360

OneSpin's products assures the integrity of SoCs, ASICs, and FPGAs. The unique exhaustive technology reduces time-to-market while providing 100% confidence that the design has been fully verified.

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Precision Series

Provides FPGA vendor-independent logic synthesis, offering reduced time to market, fewer design defects, and superior quality of results. The powerful optimisation engines, context sensitive GUI, and advanced timing algorithms result in faster designs with higher device utilisations.

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Questa Advanced Verification

The Questa verification solution is an assemblage of technologies, methodologies, and libraries for modern ASIC and FPGA designs. Questa continues to evolve in response to the growing complexity of SoC designs.

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ReqTracer

Simplifies, automates, and enables requirements traceability from specification of the hardware specification through HDL coding, implementation, and validation.

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