Revolutionary results are insufficient if new technology doesn’t fit into existing processes and flows. Questa inFact easily integrates into current verification environments, reusing existing classes, constraints, and covergroups to allow teams to continue benefiting from existing descriptions.
Using Questa inFact technology ensures high quality
Questa inFact is the industry’s most advanced Portable Stimulus testbench automation solution. It targets as much functionality as traditional constrained random testing, achieves coverage goals 10X to 100X faster, and scales across block, subsystem, and SoC level.
This enables engineering teams to complete their functional verification process in less time, and/or to expand their coverage goals, testing functionality that previously fell below the cut line. Questa inFact also generates tests that an engineer might not envision, reaching difficult corner cases that alternative testing techniques typically miss.
Using Questa inFact technology ensures high quality products.
Revolutionary results are not enough. Advanced technology must fit into existing processes and flows. Questa inFact integrates into current verification environments with little to no disruption. It supports the UVM, standard languages such as SystemVerilog, SystemC, C/C++, and even C tests for embedded processors.
Achieve coverage goals 10X to 100X faster
The number of companies turning to Questa inFact is growing exponentially. The minimum result experienced to date has been 10X faster achievement of target coverage. But many companies have gained 100X or better. Why such dramatic gains in productivity? The nature of constrained random testing lends itself to uncontrollable redundancy.
With Questa inFact, one company achieved more coverage in 48 CPU hours than they had with constrained random testing in 3175 hours, 66x gain. Another was stuck at 60% of target coverage after 8 weeks of simulation on 6 CPUs. They achieved 100% target coverage in just 36 hours on the same 6 CPUs.