Questa Verification IP
Overview
Questa Verification IP improves quality and reduces schedule times by building protocol and methodology reusable components that support many industry standard interfaces.
The Questa Verification IP (QVIP) portfolio provides coverage across a broad portfolio of over 100 standard interface protocols. Questa VIP delivers a complete verification solution including ready-to use test plans, test suites, checkers, and coverage models, making it easy to adopt and implement.
Introducing Questa Verification IP
The best way to create a SoC is with design IP: blocks that connect to standard buses such as AMBA AXI or PCIe, or memory devices. How do you then check that your chip works correctly with the IP? You need to create stimulus that follows the protocol, but who has time to become an expert at each protocol? The best way to verify your design is with Verification IP that has deep knowledge of the protocol. Siemens QVIP is available for a wide range of protocols such as AXI, AHB, PCIe/NVMe, Ethernet, USB, Serial, plus DRAM and Flash memories.
Questa Verification IP improves quality and reduces schedule risk with a broad portfolio of reusable protocol and methodology components that support a wide range of industry-standard interfaces, eliminating time spent developing and maintaining custom BFMs, verification components, or VIP.
Verification IP Memory Models & Protocols
Questa Verification IP integrates seamlessly into all verification environments on any simulator. With a consistent and easy-to-use UVM architecture across all protocols, QVIP ensures maximum productivity and flexibility for the verification of block level, subsystem, and SoC designs.
Broad Support
The Questa Verification Protocol Library includes an extensive range of ready-to-use protocols.
Fast and Accurate Memory Models
The Questa Verification Memory Library provides a complete memory verification IP library in one consistent industry-standard format, reducing the time it takes engineers to set up verification runs, enabling them to focus on verifying unique, high-value parts of their designs.
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The Verification Academy
The Verification Academy is a collection of free online courses, focusing on various key aspects of advanced functional verification.
Software for IC Verification
QuestaSim
Simulation and Debug
Combines high performance and capacity simulation with unified advanced debug and functional coverage for the most complete native support of Verilog, SystemVerilog, VHDL, …
Catapult HLS
HLS and Verification
Industry leading C++ / SystemC High-Level Synthesis with Low-Power estimation / optimization. Design checking, code, and functional coverage verification plus formal make HLS more than ….
Questa Inspect
Static RTL Bug Hunting
A fully-automatic formal bug hunting app that finds deeply hidden bugs due to common RTL coding errors, Inspect makes it possible to eliminate a wide range of bugs without a testbench.
Questa CDC
CDC Verification
Questa CDC finds errors using structural analysis to detect clock-domains, synchronisers, and low power structures via the UPF. It then generates assertions and metastability models for …
Questa Lint
Static RTL Verification
Questa Lint provides adaptive, integrated insight to the designer to ensure that the quality requirements and intent are met. Pre-configured methodologies provide immediate, intuitive feedback …
Veloce proFPGA
Hardware-Assisted Verification
The Veloce proFPGA system architecture offers best-in-class modularity, scalability, flexibility and portability to serve the verification requirements of today’s hardware and software engineers.