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Calibre Design Solutions


Calibre Design Solutions delivers a complete IC verification and DFM optimisation platform that speeds designs from creation to manufacturing, addressing all sign-off requirements.

Calibre Design Solutions is the industry leader for IC verification, due to the exceptional performance, accuracy, and reliability of the Calibre nmPlatform. Tight collaboration with foundries, IC design houses, and industry standards organisations ensures Calibre tools continuously provide innovative functionality that meets or exceeds state-of-the-art requirements and delivers real competitive value.

Calibre Design Solutions

Relentless growth in the number and complexity of semiconductor verification and manufacturing requirements challenges IC design companies to deliver state-of-the-art, competitive products on a timely basis to a fast-moving market. To succeed, companies need EDA tools that can deliver trusted results and help them meet their market goals.

Calibre Design Solutions delivers the most accurate, most trusted, and best-performing IC sign-off verification and DFM optimisation in the EDA industry.

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The Calibre nmDRC Platform provides foundries, IDMs, and fabless companies with comprehensive, innovative verification technology for all nodes and processes.

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Calibre Circuit & Reliability Verification

The industry-leading Calibre circuit verification toolsuite includes layout vs. schematic (LVS) checking, reliability verification, and parasitic extraction.

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Calibre Interfaces

The Calibre nmPlatform integrates with all major custom design tools and place and route systems, as well as a wide range of specialised design tools.

Key Features and Benefits

  • The underlying hierarchical processing engine ensures robust testing and implementation across all applications, while providing best-in-class runtimes.
  • Common design platform integration enables rapid deployment of all Calibre nm Platform applications into the user’s design environment.
  • Integrated scripting environment across all applications (SVRF and TVF) allow users to customise their design and verification environment to suit the specific and evolving needs of their design teams.
  • Hyperscaling technology brings superior scalability and lightning fast-run times for computationally intense applications, while reducing capital expenditures by extending the useful life of existing shared memory processor systems, and fully utilising inexpensive distributed rack systems.
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Simulation and Debug

Combines high performance and capacity simulation with unified advanced debug and functional coverage for the most complete native support of Verilog, SystemVerilog, VHDL, …

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HLS and Verification

Industry leading C++ / SystemC High-Level Synthesis with Low-Power estimation / optimization. Design checking, code, and functional coverage verification plus formal make HLS more than ….

Static RTL Bug Hunting

A fully-automatic formal bug hunting app that finds deeply hidden bugs due to common RTL coding errors, Inspect makes it possible to eliminate a wide range of bugs without a testbench.

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CDC Verification

Questa CDC finds errors using structural analysis to detect clock-domains, synchronisers, and low power structures via the UPF. It then generates assertions and metastability models for …

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Static RTL Verification

Questa Lint provides adaptive, integrated insight to the designer to ensure that the quality requirements and intent are met. Pre-configured methodologies provide immediate, intuitive feedback …

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Hardware-Assisted Verification

The Veloce proFPGA system architecture offers best-in-class modularity, scalability, flexibility and portability to serve the verification requirements of today’s hardware and software engineers.

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